1. Field of the Invention
The present invention relates to digital-signal coding and decoding, and more particularly, to coding and decoding of digital signals with the use of a Coded-Mark-Inversion (CMI) code.
2. Description of the Related Art
In the CMI code specified by Recommendation G.703-Annex A of the International Telecommunication Union (ITU-T) and others, block encoding is performed such that a xe2x80x9c0 (L)xe2x80x9d bit having a period of T in a binary digital signal (having xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, or xe2x80x9cLxe2x80x9d or xe2x80x9cHxe2x80x9d) is converted to two bits xe2x80x9c01 (LH)xe2x80x9d, each bit having a period of T/2, and a xe2x80x9c1 (H)xe2x80x9d bit having a period of T is converted alternately to two bits xe2x80x9c00 (LL)xe2x80x9d and two bits xe2x80x9c11 (HH)xe2x80x9d, each bit having a period of T/2. In the present specification, a bit having a period of T or two bits each having a period of T/2 is called a time slot in some cases.
With the use of the CMI code, the transmission rate of a digital signal is substantially doubled. However, bit sequence independence (BSI) is obtained for consecutive 0""s and consecutive 1""s in an input signal, the size of hardware required for coding/decoding can be reduced, and transmission errors can be easily checked by code rule checking. The CMI code has been widely used in small- and medium-capacity fiberoptic transmission systems, intra-office transmission systems, fiberoptic access systems, optical data links, and others having transmission rates from several megabits per second to several tens of megabits per second.
The CMI code is a code with redundancy, in which the code is made to superpose a lower speed signal than the main, according to a rule called coding rule violation (CRV). More specifically, CRV is used for a system to transmit a supervisory signal, an 8-kHz frame signal, a voice signal, or a data signal by superimposing them on a main signal. CRV includes CRV0, in which xe2x80x9c0 (L)xe2x80x9d in the main signal is coded to xe2x80x9c10 (HL)xe2x80x9d, and CRV1, in which xe2x80x9c1 (H)xe2x80x9d in the main signal is coded to either xe2x80x9c11 (HH)xe2x80x9d or xe2x80x9c00 (LL)xe2x80x9d, whichever has the same polarity as a code to which the previous xe2x80x9c1xe2x80x9d was coded.
In the above description, signal states xe2x80x9c0xe2x80x9d and xe2x80x9c1xe2x80x9d are associated with xe2x80x9cLxe2x80x9d and xe2x80x9cHxe2x80x9d, respectively. Depending on a component (such as that formed by ECL) actually used for a CMI coding circuit/decoding circuit, signal states xe2x80x9c0xe2x80x9d and xe2x80x9c1xe2x80x9d may be associated with xe2x80x9cHxe2x80x9d and xe2x80x9cLxe2x80x9d, respectively. In this case, xe2x80x9cLxe2x80x9d and xe2x80x9cHxe2x80x9d in the above description should be read reversely. The above relationships also apply to the following description of the present specification.
As a system in which the CRV technique is applied to the CMI code, such as a fiberoptic transmission system, a synchronous CRV superposition (transmission) system is generally used, in which a signal to be superposed by the CRV technique is synchronized with the main signal, the transmission side forms CRV frames to superpose the signal, and the receiving side detects a CRV-frame synchronization pattern to extract the signal.
To superpose an asynchronous signal on the main signal, and to perform CRV superposition by a simpler configuration than the synchronous CRV superposition (transmission) system, an asynchronous CRV superposition (transmission) system has been examined, which does not require CRV-frame synchronization. As an example, a scheme is shown in FIG. 4 of xe2x80x9cAsynchronous Superposition Technique of Low Speed Signal Upon CMI-Coded Main Signal Using Coding Rule Violationxe2x80x9d, Proceedings of 1982 General Convention of the Institute of Electronics and Communication Engineers, Kanagawa, Japan, p. 2186, in which, in order to superpose an asynchronous signal on the main signal, the asynchronous signal to be superposed is sampled each m (positive integer) bits of the main signal, CRV is applied when the sampled data is xe2x80x9c1 (H)xe2x80x9d, and CRV is not applied when the sampled data is xe2x80x9c0 (L)xe2x80x9d.
In the asynchronous CRV superposition (transmission) system, it is not easy for the receiving side to differentiate a CRV-indication time slot from a time slot having a transmission error. More specifically, in the asynchronous CRV superposition (transmission) system, when there is CRV1 preceded by n (positive integer) consecutive 0""s further preceded by xe2x80x9c1xe2x80x9d (indicated by a solid line), as shown in FIG. 11, if one bit indicated by (a) in the consecutive 0""s or the foregoing xe2x80x9c1xe2x80x9d indicated by (b) suffer transmission error (indicated by dotted lines), CRV1 is erroneously recognized as xe2x80x9c1 (H)xe2x80x9d. In the case of (b), the foregoing xe2x80x9c1xe2x80x9d is erroneously recognized as CRV0. In other words, a CRV discrimination error is propagated (spread). When bad conditions exist on a transmission line, the quality of a superposed signal regenerated at the receiving side may deteriorate.
The asynchronous CRV superposition (transmission) system superposes an asynchronous signal having a lower speed than the main signal. To improve the performance of the transmission system, it is preferred that communications be performed by superposing a signal having as high a speed as possible. In other words, there are demands for development of a signal coding/decoding system which does not adversely affect the main signal and which allows a high-speed asynchronous signal to be transmitted with high quality.
It is an object of the present invention to provide a CMI coding method, a CMI decoding method, a CMI coding circuit, and a CMI decoding circuit which do not adversely affect a main signal and which always allow an asynchronous signal having as high a speed as possible to be superposition-transmitted by CRV of the CMI code, with a simple procedure and a simple hardware structure.
In a CMI coding method according to the present invention, an asynchronous signal is superposed on a main CMI-coded signal with the use of only CRV0 as CRV. In addition, when the main CMI-coded signal is replaced with CRV0 for a signal to be superposed, since the main signal cannot be transmitted, the CMI-code coding method is configured such that two binary bits of the main signal, which should be originally CMI-coded and transmitted in a time slot in which CRV0 is to be disposed and in the next time slot thereof, are two-bit-coded according to a predetermined rule, and the two-bit code is transmitted by the use of the first half and the second half of the next time slot.
In the present specification, a time slot in which CRV is disposed is called a CRV-indication time slot. The next time slot of a CRV-indication time slot, in which a two-bit-coded code by a coding method according to the present invention is disposed, is called a crammed main-signal time slot. A CRV-indication time slot and the crammed main-signal time slot may be collectively called extra time slots.
More specifically, in the CMI coding method, whether CRV0 is substituted for the main CMI-coded signal is determined according to the state of a signal to be superposed. For example, when the signal polarity to be superposed is positive (it has a level of xe2x80x9c1xe2x80x9d or xe2x80x9cHxe2x80x9d), it is determined that CRV0 is disposed. Instead of the main CMI-coded signal, CRV0 (xe2x80x9cHLxe2x80x9d) which is a two-bit code, the two bits having opposite polarities to those of a two-bit code (xe2x80x9cLHxe2x80x9d) in which each bit has a period of T/2 and in which the two bits indicate a main signal state of xe2x80x9c0xe2x80x9d or xe2x80x9cLxe2x80x9d is disposed as required. In the next time slot of the time slot where CRV0 is disposed, a code is, disposed which is coded such that, when two binary bits of the main signal, which should be originally CMI-coded and transmitted in the time slot where CRV0 is to be disposed and in the next time slot thereof, have the same polarity, the two bits of the main signal are coded to a two-bit code, each bit having a period of T/2 and different polarity from each other.
A CMI decoding method according to the present invention performs processing in the order reverse to that of the CMI coding method described above. More specifically, when CRV0 is detected in a received CMI code, it is discriminated that a signal different from the main signal has been superposed, and a two-bit code disposed in the time slot next to the time slot where CRV0 is disposed is decoded to the original two bits of the main signal. In addition, a pulse having a predetermined time width is generated according to the CRV discrimination, and the signal superposed on the main signal at the coding side is regenerated from these pulses.
The CMI coding and decoding methods described above are the same as the conventional CMI coding and decoding methods except for extra time slots.
A CMI coding circuit for converting a main signal and a signal to be superposed to a CMI code includes a sampling circuit for sampling the signal to be superposed at a redetermined period, and a coder for converting the main signal and.sampled low speed signal to the CMI code. The coder converts the main signal to the conventional CMI code, while, according to the sampled result, CRV0 is disposed in a certain time slot (CRV-indication time slot), and two binary bits of the main signal, which are originally positioned at the CRV-indication time slot and in the crammed main-signal time slot, are converted-to a code according to a particular CMI coding rule and disposed in the crammed main-signal time slot.
A CMI decoding circuit for regenerating the original signals from a CMI code in which a low speed signal is superposed on a main signal includes a decoder for converting a received CMI code to the main signal and picking CRV0s up; and a low speed signal regenerator for regenerating the low speed signal from the picked up CRV0s according to a predetermined rule. The decoder converts the received conventional CMI code portion to the main signal, while detects CRV0s and converts a code disposed in the time slot (crammed main-signal time slot) after a time slot where CRV0 is disposed to two binary bits of the main signal according to a particular CMI coding rule. The low speed signal regenerator regenerates the low speed signal according to a predetermined rule.